Team
TRELA brings together students and researchers in electrical engineering, computer engineering and computer science who like to build things, measure them, and ask whether they can be trusted.
Postdoctoral researchers
Ph.D. students
M.S. students
Join TRELA
We are looking for motivated Ph.D., M.S. and undergraduate students interested in hardware security, machine learning for chips, and analog/RF design.
Alumni
Our alumni work in research and engineering at Apple, Intel, Google, Samsung, Advantest, NXP and many other companies, and hold faculty positions at universities around the world.
Former postdoctoral researchers
Mohammed Omais Shayan
Ph.D. NYU, 2020
Design obfuscation through reconfigurable computing
Digital Design Engineer, Codelucida
Mustafa Shihab
Ph.D. UT Dallas, 2021
CAD flow and applications of hybrid ASIC/TRAP circuits
Member of Technical Staff, Intel
Georgios Volanis
Ph.D. UT Dallas, 2020
Robust and trustworthy analog/RF ICs
Analog Design Engineer, Argo Semiconductors
Mohammad Mahdi Bidmeshki
Ph.D. UT Dallas, 2018
Proof-carrying hardware
Security Engineer, Intel
Kiruba Subramani
Ph.D. UT Dallas, 2018
Hardware Trojans in wireless networks
Systems Engineer, Silicon Labs
Angelos Antonopoulos
Ph.D. Technical University of Crete, 2014
Trusted and reliable analog/RF integrated circuits and systems
Patent Engineer, u-blox
Ke Huang
Ph.D. University of Grenoble, 2011
Machine learning in semiconductor manufacturing
Associate Professor, San Diego State University
Ph.D. graduates
Suraag Tellakula
UT Dallas
Machine learning-based layout reliability analysis
Ching-Yi Chang
UT Dallas
Semiconductor manufacturing data analytics for provenance attestation
Thomas Broadfoot
UT Dallas (co-advised with C. Sechen)
Next generation implementation of transistor-level programming fabrics
Postdoctoral Researcher, TRELA
Vineeth Niranjan
UT Dallas
Applications of machine learning in low-cost IC trimming
Member of Technical Staff, Qorvo
Deepika Neethirajan
UT Dallas
Applications of machine learning in semiconductor manufacturing
Member of Technical Staff, NXP
Apurva Jain
UT Dallas (co-advised with C. Sechen)
Testing and verification challenges in a transistor-level programmable fabric
Member of Technical Staff, Intel
Shiva Shankar Thiagarajan
UT Dallas
Reliability-aware optimization of integrated circuits
Member of Technical Staff, Apple
Xiangyu Xu
UT Dallas (co-advised with C. Sechen)
Custom routing methods for transistor-level programmable fabrics
Member of Technical Staff, Intel
Yunjie Zhang
UT Dallas
Hardware-based malware detection in modern microprocessors
Member of Technical Staff, Google
Mustafa Shihab
UT Dallas, 2021
Intellectual property protection through transistor-level programming
Member of Technical Staff, Intel
Yichuan Lu
UT Dallas
Post-production performance calibration in analog/RF devices
Member of Technical Staff, Advantest
Georgios Volanis
UT Dallas, 2020
On-chip intelligence for robust and trustworthy analog/RF ICs
Analog Design Engineer, Argo Semiconductors
Gaurav Rajavendra Reddy
UT Dallas, 2020 (David Daniel Thesis Award)
Machine learning-based hotspot detection: fallacies, pitfalls and marching orders
Member of Technical Staff, Intel
Jingxiang (Amelie) Tian
UT Dallas, 2019 (co-advised with C. Sechen)
A transistor-level dynamically reconfigurable integrated circuit block
CPU Design Engineer, Apple
Monir Zaman
UT Dallas, 2019
Cross-layer power conditioning in multi-core mixed-signal SoCs
Member of Technical Staff, Raytheon
Constantinos Xanthopoulos
UT Dallas, 2019
Spatial correlation extraction and decomposition in semiconductor data
Member of Technical Staff, Advantest
Liwei Zhou
UT Dallas, 2018
Microprocessor workload execution forensics
Member of Technical Staff, ASML
Mohammad Mahdi Bidmeshki
UT Dallas, 2018
Proof-carrying hardware
Security Engineer, Intel
Kiruba Subramani
UT Dallas, 2018
Hardware Trojans in wireless networks
Systems Engineer, Silicon Labs
Ali Ahmadi
UT Dallas, 2017
Machine learning in test cost reduction, yield estimation and fab-of-origin attestation
Member of Technical Staff, GlobalFoundries
Yu Liu
UT Dallas, 2017
Hardware Trojans in wireless cryptographic ICs
Research Staff Member, Samsung Research
Dzmitry Maliuk
Yale, 2013
Neural network design and implementation for analog/RF BIST
Researcher, Quant Labs
Yier Jin
Yale, 2012
Hardware Trojans in wireless cryptographic ICs
Associate Professor, University of Florida
Nathan Kupp
Yale, 2012 (IEEE TTTC E.J. McCluskey Best Doctoral Thesis Award)
Statistical methods for RF-to-DC correlation in analog/RF circuit testing
Lead Data Scientist, Thumbtack
Michail Maniatakos
Yale, 2012
Workload-cognizant resilience analysis in modern microprocessors
Assistant Professor, NYU Abu Dhabi
Naghmeh Karimi
Visiting researcher at Yale, 2007 to 2009
RTL concurrent error detection in microprocessor controllers
Assistant Professor, University of Maryland Baltimore County
Feng Shi
Yale, 2007
Fault simulation and test generation strategies for asynchronous circuits
RF Circuit Designer, Marvell Semiconductor
Sobeeh Almukhaizim
Yale, 2007
Optimization frameworks for designing reliable circuits
Director, National Center for Education Development, Kuwait
Haralampos Stratigopoulos
Yale, 2006
A machine-learning approach to analog/RF circuit testing
CNRS Researcher, LIP6
M.S. graduates
Justin Russo
UT Dallas, 2022
RISC-V implementation on a hybrid TRAP/FPGA platform
Project Engineer, Ford
Christiana Kapatsori
UT Dallas, 2020
Hardware security of analog/RF ICs
Hardware Design Engineer, STMicroelectronics
Justin McMillan
UT Dallas, 2020
Security and trust in wireless ICs
Member of Technical Staff, ARiA
Bharath Ramanidharan
UT Dallas, 2019
Custom routing solutions for TRAP
Member of Technical Staff, Apple
Christopher Rhynes
UT Dallas, 2018
Hardware security and trust in analog/RF ICs
Software Engineer, Lintec
Tianyu Chen
UT Dallas, 2015
OpenSPARC emulation on an FPGA for forensics analysis
Test Engineer, Foxconn
He (Bryan) Huang
Yale, 2009
Self-healing analog/RF circuits
Analog/RF Design Engineer, Broadcom
Thomas Verdel
Yale, 2002
Concurrent error detection in asynchronous circuits
Quantitative Equity Portfolio Manager, Cavanal Hill
Undergraduate researchers
Richard Willis
B.S. UT Dallas, 2020
Machine learning-based gesture recognition in THz imagers
Analyst, Citibank
Isaac Urcuyo
B.S. UT Dallas, 2018
FEC-based hardware Trojan design and demonstration
FPGA Design Engineer, Raytheon
Usuma Thet
B.S. UT Dallas, 2017
Architectural state visualization of emulated OpenSPARC T1
Themis Melissaris
Visiting researcher from NTUA, 2014
FPGA-based multi-core experimentation platform
Ph.D. Student, Princeton University