Research
Modern chips are designed with third-party IP, fabricated in foundries around the world, tested under tight cost limits, and deployed in safety- and security-critical systems. At every step, data is collected that can tell us whether a chip is genuine, trustworthy, and healthy. TRELA turns that data into guarantees, using machine learning and statistical analysis together with new hardware designs.
Research thrusts
Projects
Selected active projects. Code, datasets and trained models are linked from each project and paper as they are released.
Can large language models learn the “language of test”? We train and evaluate LLMs that read circuit netlists and generate test patterns for integrated circuits, alongside commercial ATPG tools.
Related publicationsA transistor-level programmable fabric that redacts critical parts of a design from the foundry, protecting hardware IP and withstanding SAT-based attacks.
Related publicationsUnderstanding and mitigating errors in analog implementations of on-die neural networks, including their resilience to radiation-based model perturbation attacks.
Related publicationsRisks and remedies for hardware Trojans that hide information in the transmission margins of wireless ICs, with an experimentation platform for research and training.
Related publicationsPhysical unclonable functions engineered into human cells for cell-line authentication, and PUF-based probes for secure access to DNA storage.
Related publicationsStatistical fingerprints of the fabrication process that reveal where and when a chip was made, catching recycled and counterfeit electronics from ICs to PCBs.
Related publicationsSponsors
We gratefully acknowledge the agencies and companies that support our research.